In a network computing environment, multitudes of commands and requests for retrieval and storage of data are processed every second. To properly address the complexity of routing these commands and requests, a number of different resolutions have been implemented. In some data processing architectures, such as International Business Machines Enterprise System Architecture/390 (Enterprise System Architecture/390 is a registered trademark of International Business Machines Corporation), a channel subsystem is utilized to pass information between the main storage and input/output (I/O) devices. The channel subsystem includes one or more channel paths, each including one or more channels and one or more control units. Recently developed technologies such as the International Business Machines ESCON switch (ESCON is a registered trademark of International Business Machines Corporation), connect the I/O devices to the main memory through the control units using legacy channels to support the data transfer there between.
But as the technology improves, the performance of new system processors will require many more legacy channels than are presently in use to support the resulting increase of information transfer in the data processing systems. Current architectural constraints make the addition of such legacy channels an expensive proposition. A further challenge is to provide the link data rate required to support the data rates of new I/O devices such as DASDs and Tapes. In this case, simply adding more legacy channels does not adequately address the problem. A new architecture is needed that can scale up to the higher link speeds needed for normal transaction processing. Therefore, any new proposed architecture, must include a capacity to accommodate higher bandwidth channel links such as Fibre Channel links while providing better data rates and higher link speeds.
This application is being filed at the same time as related application, U.S. patent application Ser. No. 09/172,696 filed Oct. 14, 1998 by Casper et al., still pending; U.S. patent application Ser. No. 09/172,695 filed Oct. 14, 1998 by Casper et al., still pending; and U.S. patent Ser. No. 09/172,462 filed Oct. 14, 1998 by Casper et al., still pending, all assigned to the assignee of the present invention.
This application incorporates by reference the following patents and publications:
1) Fibre Channel Single Byte-2(FC-SB-2) Architecture (AR-6865-00-POK)
2) Fibre Channel (FC-PH) REV 4.3 ANSI X3.230-199x
3) U.S. Pat. No. 5,526,484 to Casper et. al.